\ifthenelse{\isodd{\value{page}}} {\newpage{~}} {}

\section{Pattern noise} \label{PAT}
%%%%%%%%%%%%%%%%%%%%%%

Although first-order \ds modulators are significantly simpler to implement in VLSI than higher-order modulators, they are rarely
used due to two problems: 

\begin{enumerate}
\item In traditional SC \ds modulators the oversampling ratio is limited by slew-rate effects and finite op-amp gain. As the
  noise-shaping is only first-order, the digital resolution will normally not be sufficient high. 
\item The quantization error in a first-order \ds modulator is highly correlated with the input signal which may cause problems
  due to pattern noise.
\end{enumerate}

The FDSM concept is, so far, based on first- and second-order noise-shaping. Particularly the D flip-flop FDSM solutions are
suitable for very high sampling speed operation, and can therefore provide a high digital resolution even if the noise shaping is
only first-order. In this way problem no.1 may be overcomed. By using multi-bit quantization, implemented either by parallel
modulators, or the modulo-$2^n$ FDSM, problem no.2 can be significantly reduced as the worst-case signal to pattern noise ratio is
reduced by the number of bits in the quantizer. In some applications it will however be desirable to use a single D flip-flop
FDSM with a bit-stream output, and in this case the effect of pattern noise must be carefully analyzed. In this section we will
start by verifying that the FDSM is equivalent to a traditional \ds modulator with respect to pattern noise. However, since the
internal signal range in the FDSM may be much lower than in a traditional \ds modulator, and  the range is defined by
frequency ratios and not by voltages, there can be a significant difference in performance.


\subsection{Background}
%%%%%%%%%%%%%%%%%%%%%%%

The basis for \lig{sq1}\ which predicts the resolution of the delta-sigma modulator is based on the assumption that the
quantization noise is white, and thus uncorrelated with the input signal. This assumption is suitable for most busy input signals.
However, for DC or slowly varying inputs, the white-noise model is far from exact as the quantization error will be heavily
correlated with the input signal.  When the input signal is DC, the delta-sigma modulator output will bounce between two levels
keeping its mean equal to the input signal.  For certain DC input values the output sequence will be repetitive. If the repetition
frequency lies in the signal band, the modulation will be noisy, if not, it will be quiet. In \fig{dc1}\ (top) the input to a
traditional delta-sigma modulator is swept over different DC values and the resulting in-band noise power is measured
\cite{pattern}. The horizontal line represent the calculated in-band noise level given by the white quantization noise model. As
we see from the figure, there are certain input DC values which produce an output noise power far above the calculated level. For
other input values the measured power is far below the white-noise level. This inherent feature is called pattern-noise. From
\cite{pattern} half the total power is found to be in the end peaks while 1/16 in the central ones.

\begin{figure}[htb]
\begin{center} \epsfig{file=fig/walley1.eps,width=11cm} \end{center}
\caption{\small \em Top) Measured DC scan, traditional delta-sigma
  modulator. Middle) Theoretical DC model. Bottom) Simulated FDSM frequency scan. Horizontal lines - white noise model.  For all
  plots - oversampling ratios = 9.14 \label{dc1}}
\end{figure}

Most traditional delta-sigma modulators need to utilize most of their signal range to reduce the effect of internal noise sources.
It is therefore normally necessary to let the signal range overlap many of the pattern noise peaks in the figure. As we soon will
see, the FDSM is equivalent with respect to pattern noise, but here the internal signal range can be very small compared to the
output levels. As the signal range location is defined by the $f_c/f_{clk}$ ratio, we may for small signal ranges, locate the
signal range in a pattern noise valley and achieve a significantly higher resolution than the white-noise model predicts. A
necessary requirement for doing so, is that  we have control over practical effects such as temperature drift and aging which
may affect the $f_c/f_{clk}$ ratio.

\begin{figure}[htb]
\begin{center} \epsfig{file=fig/walley2.eps,width=11cm} \end{center}
\caption{\small \em Theoretic DC model for different oversampling ratios, $f_{clk}=8$MHz. Horizontal lines - white noise model.  
\label{dc2}}
\end{figure}

The pattern noise picture is a direct function of the oversampling ratio. In \fig{dc2} a theoretical  DC scan is carried out for three
different oversampling ratios. We notice that both the heights of each peak and the valley depth is increased as the oversampling
ratio is increased. In addition, the number of visible peaks increases. However, since the widths of the peaks are reduced, the
power in each peak is inversely proportional to the oversampling ratio cubed.

\subsection{A theoretical model for pattern-noise}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

In \cite{pattern} an analytical model for the output of a first-order delta-sigma modulator with DC input is
given. The analysis is carried out for a continuos-time modulator, which is shown to be equivalent to a discrete-time model. For a
DC input of amplitude $x$, the output components that lie in half the frequency band can be expressed as

\begin{equation}
y_x(t) = x + 2 \sum_{l=1}^{\infty} \frac{\sin (\pi l x)}{\pi l} \cos (2\pi \, \mbox{frac} [lx] t f_{clk}) \label{pa1}
\end{equation}
Where frac$[x]$ is the fractional roundoff of $x$, that is $x$ minus the closest integer to $x$. In Eq.~\ref{pa1} the first part
is recognized to be the input itself, while the sum represents the quantization noise. As we see, the quantization noise consists
of scaled harmonic components with a frequency dependent on the index $l$. For a harmonic component to lie in the signal band
$0<f<f_{max}$ we have

\begin{equation}
\frac{f}{f_{clk}}=|\mbox{frac}[lx]|<\frac{f_{max}}{f_{clk}} \label{pa3}
\end{equation}
and the power associated with that component will from \lig{pa1}\ be 

\begin{equation}
P_l(x)= 2 \frac{\sin^2(\pi \,\mbox{frac} [l x])}{(\pi l)^2} \label{pa4}
\end{equation}

The total noise power in the signal band is then found by adding together the power of all harmonics where the index $l$ satisfies
\lig{pa3}. The two equations \lig{pa3} and \lig{pa4} are the basis for the theoretic model used in this thesis. In \fig{dc1}
(middle) the theoretic model is used to predict the pattern noise picture for the same oversampling ratio that was used in the
measurement.  Although the measured result is more smoothed, the model resembles the main shape.

\subsection{Verification of the FDSM equivalence by simulation}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

To be able to use the presented pattern noise model to describe pattern noise in the FDSM, we must first verify that the FDSM
behaves equivalent to a traditional delta-sigma modulator with respect to pattern noise.  Sweeping the component
$2(f_c+kx_n)/f_{clk}$ in \lig{saada}\ over the interval 0-1 is equivalent to sweeping the input $x$ in the traditional modulator
over the interval 0-1, as the traditional modulator output can be expressed $y_n=x_n+e_n-e_{n-1}$.

A simulated frequency scan of a D flip-flop FDSM with $f_c$=425KHz and $f_{clk}$=8MHz was carried out. The signal bandwidth was
set to 437KHz to match the two other plots in \fig{dc1}, and the input frequency was swept from 0 to 4MHz in 500 steps. In
\fig{dc1}\ (bottom) the resulting in-band noise-power is shown. The match with the theoretical model is almost exact. The D
flip-flop FDSM was simulated in C while the output bit-stream analyzed in Matlab (Appendix B).  In \fig{dc6}\ the input frequency
is swept from 0-12MHz to illustrate the pattern noise picture for multi-bit conversion. By this we can conclude that the model
given by \lig{pa3} and \lig{pa4} is well suited to describe pattern noise in the FDSM for constant inputs. By constant inputs in
the FDSM we refer to constant or unmodulated input frequencies.

\begin{figure}[htb]
\begin{center} \epsfig{file=fig/walley_teo_ext.eps,width=11cm} 
\end{center} \caption{\small \em Theoretic DC model for multi-bit conversion $f_{clk}=8$MHz, oversampling ratio = 9.14 } \label{dc6}
\end{figure}

\subsection{Valley utilization}
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

For systems where the FDSM signal range is small, the range may be located in a pattern noise valley by choosing a proper
$f_c/f_{clk}$ ratio. As an example, for a specific FM demodulation system the carrier frequency was 425KHz with maximum deviation
550Hz, and a 8MHz system clock was applied.  In this case the signal range is given by $4 \Delta f / f_{clk}= 0.00025$ or 0.025\%
of the quantization level spacing illustrated in \fig{dc2}.  In \fig{walley_zoom1}\ a zoom of the quantization level interval is
shown where the signal range is illustrated by a short horizontal line on top of the peak/valley landscape.  The oversampling
ratio is 10 000 and there are peaks at $\approx$20dB above the white noise level. We also notice valleys far below this level. If
the $f_c/f_{clk}$ ratio can be properly chosen and fixed we may gain a significantly amount of resolution by locating the range
in one of these valleys.

In \fig{bat}\ the picture is zoomed down to the size of the dynamic range, and the range is now located over one of the highest
peaks in \fig{walley_zoom1}. Now the structure of the peak is revealed showing a symmetrical bat shape. The top is $\approx$20dB
higher than the white noise level while the area close to its side walls are $>$30dB lower than the white noise level.

In many systems it is not possible to keep a fixed $f_c/f_{clk}$ ratio due to temperature drift and process deviations. In this
case the dynamic range may accidentally be located over one of the peaks in the pattern noise landscape, and a significantly
performance reduction will result. One way to overcome this problem may be to use a feedback arrangement where the mean value of
the decimator output is used to tune either $f_c$ or $f_{clk}$ to achieve a proper $f_c/f_{clk}$ ratio. Another solution is to
use a dither signal to smooth out the pattern noise landscape. In this way the peaks are removed at the cost of shallower valleys as
we will see next.

\begin{figure}[htb]
\begin{center} \epsfig{file=fig/walley_zoom1.eps,width=13cm} \end{center}
\caption{\small \em Frequency scan, theoretic model. Zoom of \fig{dc2} (bottom). Short horizontal line in center/top indicates
  FDSM dynamic range. Long horizontal line - white noise model. } \label{walley_zoom1}
\end{figure}